DfR Solutions July Webinars
We invite you to attend the DfR Solutions July Webinars.
Best Practices in Thermal Derating
In the early stages of product development, effective design-for-reliability (DFR) approaches can have critical impact to the final product integrity. The goal is to assure adequate product strength against lifecycle stresses proactively. At the component level, identifying and controlling critical reliability factors can take place in schematics and prototype stage (as well as later) and component derating is one popular DFR approach for assuring that individual component will be able to operate robustly against major stress elements.
Component derating is the practice of reducing stresses on electronic components to improve the end product reliability. In this webinar you will learn best practices, tools, and techniquies to improve your thermal derating process to improve overall product reliability.
Details
Presented by Gil Sharon
Thursday, July 14, 2016; 5:00 PM - 6.30 PM CEST and 8:00 PM - 9.30 PM CEST sessions available
Developing a Robust Memory Strategy
Memory devices are at the heart of our digital lives from wearables to smart phones, entertainment devices and the cloud. The term “memory” is ubiquitous. However, it is often forgotten that there are many types of memory and a one-device-fits-all approach doesn’t work. The architecture, reliability challenges, risks of obsolescence and level of system integration must be considered to develop a robust memory strategy for electronics design.
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Presented by Ed Wyrwas
Thursday, July 28, 2016; 5:00 PM - 6.30 PM CEST and 8:00 PM - 9.30 PM CEST sessions available
This year the program and the knowledge market focuses on specific themes: "FPGA, Security, Embedded, Internet of Things and PCB Technologies". To make the development process smoother the participating companies will inform you of the improvements implemented in hardware, software and testing within the themes.
A New, More Powerful Analog/Mixed Signal ICs, RF and MEMS Design FlowA webinar that will show the power of the Tanner IC Design and Verification flow and some new additions that are complementary to this already advanced AMS and MEMS IC Design toolset.